Publication Type:Journal Article
Source:Applied Physics Letters, American Institute of Physics Inc., Volume 71, Number 3, p.356-358 (1997)
A high density ferroelectric memory process flow requires the integration of conducting barrier layers to connect the drain of the pass-gate transistor to the bottom electrode of the ferroelectric stack. We are studying the effect of crystallinity of the TiN/Pt barrier layer with Si wafers on the ferroelectric properties of La0.5Sr0.5CoO3/Pb(Nb0.04Zr 0.28Ti0.08)O3/La0.5Sr 0.5CoO3 (LSCO/PNZT/LSCO) capacitors. Structural studies indicate complete phase purity (i.e., fully perovskite) in both epitaxial and polycrystalline materials. The polycrystalline capacitors show lower remnant polarization and coercive voltages. However, the retention, fatigue, and imprint characteristics are similar, indicating minimal influence of crystalline quality on the ferroelectric properties. © 1997 American Institute of Physics.
cited By 61