Publication Type:Journal Article
Source:Applied Physics Letters, Volume 80, Number 25, p.4801-4803 (2002)
Keywords:Capacitive couplings, cobalt compounds, Electrical response, Epitaxial ferroelectric, Epitaxial growth, Ferroelectric capacitors, Ferroelectric layers, Ferroelectric materials, ferroelectricity, Low temperatures, Perovskite, Perovskite layers, pulse width, PZT, Semiconducting silicon compounds, Silicon substrates, Silicon wafers, Sol-gel process, SrTiO, Template layers, TiO, transmission electron microscopy, X ray diffraction analysis
Use of an epitaxial conducting template has enabled the integration of epitaxial ferroelectric perovskites on silicon. The conducting template layer, LaxSr1-xTiO3 (LSTO), deposited onto (001) silicon wafers by molecular-beam epitaxy is then used to seed 001-oriented epitaxial perovskite layers. We illustrate the viability of this approach using PbZr0.4Ti0.6O3 (PZT) as the ferroelectric layer contacted with conducting perovskite La0.5Sr0.5CoO 3 (LSCO) electrodes. An important innovation that further facilitates this approach is the use of a low-temperature (450°C) sol-gel process to crystallize the entire ferroelectric stack. Both transmission electron microscopy and x-ray diffraction analysis indicate the LSCO/PZT/LSCO/LSTO/Si heterostructures are epitaxial. The electrical response of ferroelectric capacitors (for pulse widths down to 1 μs) measured via the underlying silicon substrate is identical to measurements made using conventional capacitive coupling method, indicating the viability of this approach. © 2002 American Institute of Physics.
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