Conducting barriers for vertical integration of ferroelectric capacitors on Si

Journal Article

Aggarwal, S, A.M Dhote, H Li, S Ankem, Ramamoorthy Ramesh

10.1063/1.123301

One of the issues impeding the commercialization of nonvolatile ferroelectric memories is the identification and development of a conducting diffusion barrier for the vertical integration of ferroelectric capacitors on Si-based transistors. We report results on the use of Ti-Al alloys as such a diffusion barrier. Our results indicate that it maintains its structural integrity and electrical conductivity after the deposition of a lead-based ferroelectric stack at 650°C. The electrical properties of the capacitors were measured through the barrier layer by making direct contact to the diffusion barrier. The properties of the capacitors measured by direct contact to the Ti-Al alloy show clearly the absence of an insulating interfacial layer. Transmission electron microscopy and Rutherford backscattering studies confirm that there is no oxidation of the conducting barrier and no reaction between it and the electrode. © 1999 American Institute of Physics.

Applied Physics Letters

74

1999

00036951

cited By 16

Ramesh Lab